A6173081

Features: ·Center power pinout·Supply voltage: 5V±10%·Access times: 12/15 ns (max.)·Current: Operating: -12: 170mA (max.) -15: 165mA (max.) Standby: TTL: 25mA (max.) CMOS: 8mA (max.)·Full static operation, no clock or refreshing required·All inputs and outputs are directly TTL compatible·Common I...

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A6173081 Picture
SeekIC No. : 004260446 Detail

A6173081: Features: ·Center power pinout·Supply voltage: 5V±10%·Access times: 12/15 ns (max.)·Current: Operating: -12: 170mA (max.) -15: 165mA (max.) Standby: TTL: 25mA (max.) CMOS: 8mA (max.)·Full static op...

floor Price/Ceiling Price

Part Number:
A6173081
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/27

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Product Details

Description



Features:

·Center power pinout
·Supply voltage: 5V±10%
·Access times: 12/15 ns (max.)
·Current: Operating:
  -12: 170mA (max.)
  -15: 165mA (max.)
  Standby: TTL: 25mA (max.)
  CMOS: 8mA (max.)
·Full static operation, no clock or refreshing required
·All inputs and outputs are directly TTL compatible
·Common I/O using three-state output
·Data retention voltage: 3V (min.)
·Available in 32-pin 300mil / 400mil SOJ packages



Pinout

  Connection Diagram


Specifications

VCC to GND . . . . . . . . . . . . . . . . . .. .  . . . . . . . -0.5V to +7V
IN, IN/OUT Volt to GND . . . . . . . .. . . . .. -0.5V to VCC +0.5V
Operating Temperature, Topr . . . . . . . . . . . 0°C to +70°C
Storage Temperature, Tstg . . . . . . . . . . -55°C to +125°C
Temperature Under Bias, Tbias . . . . . . . . -10°C to +85°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W



Description

The A6173081 is a high-speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and

operates on a 5V power supply. A6173081 is built using high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Minimum standby power is drawn by this device when chip enable is disable, independent of the other input levels.

Data retention is guaranteed at a power supply voltage as low as 3V.




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