Features: • Support for up to Five PCI Bus Masters• Support for Two Arbitration Schemes Pure Rotation Fair Rotation• Support for Bus Parking• Hidden Bus Arbitration• Interface with 33 MHz and 66 MHz PCI Systems• Implementation in Actel's SX, SX-A, ProASIC and ...
A54SX16-2: Features: • Support for up to Five PCI Bus Masters• Support for Two Arbitration Schemes Pure Rotation Fair Rotation• Support for Bus Parking• Hidden Bus Arbitration• ...
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The Arbiter core A54SX16-2 is used to efficiently manage access to a PCI bus that is shared by several masters. Access to the PCI bus is automatically determined by the individual priorities of each master.
In the most common application, customers use an embedded processor as the master with highest priority and a pure-rotation arbitration scheme among other PCI bus masters. The networking and telecom markets are the targets for this macro.