Features: • Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates)
• Highly Predictable Performance with 100% Automatic Placement and Routing
• 7.5 ns Clock-to-Output Times
• Up to 250 MHz On-Chip Performance
• Up to 228 User-Programmable I/O Pins
• Four Fast, Low-Skew Clock Networks
• More than 500 Macro Functions
• Replaces up to twenty 32 macro-cell CPLDs
• Replaces up to one hundred 20-pin PAL® Packages
• Up to 1153 Dedicated Flip-Flops
• VQFP, TQFP, BGA, and PQFP Packages
• Nonvolatile, User Programmable
• Fully Tested Prior to Shipment
• 5.0V and 3.3V Versions
• Optimized for Logic Synthesis Methodologies
• Low-power CMOS TechnologySpecificationsVCC DC Supply Voltage ............0.5 to +7.0 V
VI Input Voltage ...............0.5 to VCC +0.5 V
VO Output Voltage ............0.5 to VCC +0.5 V
IIO I/O Source Sink Current2 ..............±20 mA
TSTG Storage Temperature...... 65 to +150
Notes:
1. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Device should not be operated outside the Recommended Operating Conditions.
2. Device inputs are normally high impedance and draw extremely low current. However, when input voltage is greater
than VCC + 0.5 V or less than GND 0.5 V, the internal protection diodes will forward bias and can draw excessive current.
DescriptionActel's ACT 3 Accelerator Series of FPGAs offers the industry's fastest high-capacity programmable logic device. ACT 3 FPGAs offer a high perfomance, PCI compliant programmable solution capable of 250 MHz on-chip performance and 7.5 nanosecond clock-to-output, with capacities spanning from 1,500 to 10,000 gate array equivalent gates. For further information regarding PCI compliance of ACT 3 devices, see "Accelerator Series FPGAs-ACT 3 PCI Compliant Family."
The ACT 3 family builds on the proven two-module architecture consisting of combinatorial and sequential logic modules used in Actel's 3200DX and 1200XL families. In addition, the ACT 3 I/O modules contain registers which deliver 7.5 nanosecond clock-to-out times. ACT 3 family contain four clock distribution networks, including dedicated array and I/O clocks, supporting very fast synchronous and asynchronous designs. In addition, routed clocks can be used to drive high fanout signals such as flip-flop resets and output enables.
The ACT 3 family is supported by Actel's Designer Series Development System which offers automatic placement and routing (with automatic or fixed pin assignments), static timing anlaysis, user programming, and debug and diagnostic probe capabilities. The Designer Series ACT 3 family is supported on the following platforms: 486/Pentium class PC's, Sun®‚ and HP®‚ workstations. The software provides CAE interfaces to Cadence, Mentor Graphics®, OrCAD™ and Viewlogic®‚ design environments. Additional platforms are supported through Actel's Industry Alliance Program, including DATA I/O (ABEL FPGA) and MINC.
A1425A-3 Data Sheet
