PinoutDescriptionIntegrator series' 1200XL family were designed to integrate system logic which is typically implemented in multiple CPLDs, PALs, and FPGAs.The A1240XL-PQ144C belongs to 1200XL families. Features of the A1240XL-PQ144C are:(1)high capacity,2,500 to 30,000 logic gates,up to 3Kbits c...
A1240XL-PQ144C: PinoutDescriptionIntegrator series' 1200XL family were designed to integrate system logic which is typically implemented in multiple CPLDs, PALs, and FPGAs.The A1240XL-PQ144C belongs to 1200XL famil...
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Integrator series' 1200XL family were designed to integrate system logic which is typically implemented in multiple CPLDs, PALs, and FPGAs.The A1240XL-PQ144C belongs to 1200XL families.
Features of the A1240XL-PQ144C are:(1)high capacity,2,500 to 30,000 logic gates,up to 3Kbits configurable dual-port SRAM,fast wide-decode circuitry,up to 250 user-programmable I/O pins;(2)high performance,225 MHz performance,5 ns dual-port SRAM access,100 MHz FIFOs,7.5 ns 35-bit address decode;(3)ease-of-integration,synthesis-friendly architecture supports ASIC design methodologies,95100% device utilization using automatic place-and-route tools,deterministic,user-controllable timing via timing driven software tools with up to 100% pin fixing,IEEE standard 1149.1 (JTAG) boundary scan testing.
The absolute maximum ratings of the A1240XL-PQ144C can be summarized as:(1):the symbol is Vcc,the parameter is DC supply voltage,the limit is -0.5 to +7.0,the unit is V;(2):the symbol is VI2,the parameter is input voltage,the limit is -0.5 to Vcc+0.5,the unit is V;(3):the symbol is Vo,the parameter is output voltage,the limit is -0.5 to Vcc+0.5,the unit is V;(4):the symbol is TSTG,the parameter is storage temperature,the limit is -65 to +150,the unit is .