95V850AG

Specifications

Package TSSOP 48 Speed NA Temperature C Voltage 2.5 V


Description

2.5V PLL CLOCK DRIVER WIT
95V850AG Low skew, low jitter PLL clock driver ? Feedback pins for input to output synchronization ? Spread Spectrum tolerant inputs ? With bypass mode mux ? Operating frequency 60 to 210 MHz ? Universal input (LVTTL, LVPECL, LVDS, LVCMOS)