8XC152JB

Features: Superset of 80C51 ArchitectureMulti-Protocol Serial Communication IO Port (2048 Mbps24 Mbps Max) -SDLCHDLC Only -CSMACD and SDLCHDLC -User Definable ProtocolsFull DuplexHalf DuplexMCS-51 Compatible UART165 MHz Maximum Clock FrequencyMultiple Power Conservation Modes64KB Program Memory Ad...

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8XC152JB: Features: Superset of 80C51 ArchitectureMulti-Protocol Serial Communication IO Port (2048 Mbps24 Mbps Max) -SDLCHDLC Only -CSMACD and SDLCHDLC -User Definable ProtocolsFull DuplexHalf DuplexMCS-51 C...

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Part Number:
8XC152JB
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

Superset of 80C51 Architecture
Multi-Protocol Serial Communication IO Port (2048 Mbps24 Mbps Max)
   -SDLCHDLC Only
   -CSMACD and SDLCHDLC
   -User Definable Protocols
Full DuplexHalf Duplex
MCS-51 Compatible UART
165 MHz Maximum Clock Frequency
Multiple Power Conservation Modes
64KB Program Memory Addressing
64KB Data Memory Addressing
256 Bytes On-Chip RAM
Dual On-Chip DMA Channels
HoldHold Acknowledge
Two General Purpose TimerCounters
5 or 7 IO Ports
56 Special Function Registers
11 Interrupt Sources
Available in 48 Pin Dual-in-Line Package and 68 Pin Surface Mount PLCC Package



Pinout

  Connection Diagram


Specifications

Ambient TemperatureUnderBias..................... 0to 70
Storage Temperature ..............................-65to +150
Voltage onAnypin toVSS................ ..-0.5V to(VCC+ 0.5V)
Voltage on VCC to VSS......................... ....-0.5V to+ 6.5V
Power Dissipation .................................................1.0W
NOTICE This data sheet contains preliminary infor mation on new products in production The specifica tions are subject to change without notice Verify with your local Intel Sales office that you have the lates data sheet before finalizing a design

WARNING Stressing the device beyond the ''Absolute Maximum Ratings'' may cause permanent damage These are stress ratings only Operation beyond the''Operating Conditions'' is not recommended and ex-tended exposure beyond the ''Operating Conditions''may affect device reliability




Description

The 80C152 which is based on the MCS-51 CPU is a highly integrated single-chip 8-bit microcontroller designed for cost-sensitive high-speed serial communications 80C152 is well suited for implementing Integrated Services Digital Networks (ISDN) emerging Local Area Networks and user defined serial backplane applica-tions In addition to the multi-protocol communication capability the 80C152 offers traditional microcontroller features for peripheral IO interface and control

Silicon implementations are much more cost effective than multi-wire cables found in board level parallel-to- serial and serial-to-parallel converters The 83C152 contains in silicon all the features needed for the serial- to-parallel conversion Other 83C152 benefits include 1) better noise immunity through differential signaling or fiber optic connections 2) data integrity utilizing the standard designed in CRC checks and 3) better modulari-ty of hardware and software designs All of thesecost network parameter and real estate improvementsapply to 83C152 serial links between boards or systems and 83C152 serial links on a single board


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