89H48H12AG2ZBBLG

Specifications

Package FCBGA 1156 Speed NA Temperature Voltage PCIe Lanes 48 Switch Ports 12 Max. Payload Size Supported 2 KBytes Integrated Serdes Yes Port Link Width Negotiation Automatic Lane Reversal Automatic Polarity Inversion Automatic PCIe Generation Gen2 PCIe Revision 2 Package Size 35 x 35 mm


Description

PCIE GEN2 SWITCH
89H48H12AG2ZBBLG provides 48 PCIe Gen2 lanes and 12 ports of high-performance, deterministic system interconnect switching. All ports receive full line rate, non-blocking throughput for multiple traffic flows regardless of switch loading.