Features: *80C51 central processing unit
*8k × 8 EPROM expandable externally to 64k bytes
*An additional 16-bit timer/counter coupled to four capture registers and three compare registers
*Two standard 16-bit timer/counters
*256 × 8 RAM, expandable externally to 64k bytes
*Capable of producing eight synchronized, timed outputs
*A 10-bit ADC with eight multiplexed analog inputs
*Two 8-bit resolution, pulse width modulation outputs
*Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs
*I2C-bus serial I/O port with byte oriented master and slave functions
*Full-duplex UART compatible with the standard 80C51
*On-chip watchdog timer
*16MHz speed
*Extended temperature ranges
*OTP package availablePinoutSpecifications
PARAMETER |
RATING |
UNIT |
Operating temperature under bias |
65 to +150 |
|
Storage temperature range |
0.5 to +13 |
|
Voltage on any other pin to VSS |
0.5 to +6.5 |
V |
Input, output current on any two pins |
5.0 |
mA |
Power dissipation(based on package heat transfer limitations, not device power consumption) |
1.0 |
W |
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise noted.
DescriptionThe 87C552 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 87C552 has the same instruction set as the 80C51. Three versions of the derivative exist: *83C552-8k bytes mask programmable ROM *80C552-ROMless version of the 83C552 *87C552-8k bytes EPROM
The 87C552 contains a 8k * 8 a volatile 256 * 8 read/write data memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a 15-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART and I
2 C-bus), a "watchdog" timer and on-chip oscillator and timing circuits. For systems that require extra capability, the 87C552 can be expanded using standard TTL compatible memories and logic.
In addition, the 87C552 has two software selectable modes of power reduction-idle mode and power-down mode. The idle mode 87C552 freezes the CPU while allowing the RAM, timers, serial ports, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.
The 87C552 also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte, and 17 three-byte. With a 16MHz crystal, 58% of the instructions are executed in 0.75s and 40% in 1.5s. Multiply and divide instructions require 3s.