87C52

Features:

*80C51 based architecture
*8032 compatible
  8k * 8 EPROM (87C52)
  ROMless (80C32)
  256 * 8 RAM
  Three 16-bit counter/timers
  Full duplex serial channel
  Boolean processor
*Memory addressing capability
  64k ROM and 64k RAM
*Power control modes:
  Idle mode
  Power-down mode
*CMOS and TTL compatible
*Three speed ranges:
  3.5 to 16MHz
  3.5 to 24MHz
  3.5 to 33MHz
*Five package styles
*Extended temperature ranges
*OTP package available


Pinout




Specifications

C = commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70
I = industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 to 85
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . 65 to + 150
Voltage on VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to + 7 V
Voltage on Any Pin to VSS . . . . . . . . . . . . . . . . .0.5 V to V_CC + 0.5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
* This value is based on the maximum allowable die temperature and the thermal resistance of the package
* Notice
Stresses at or above those listed under " Absolute Maximum Ratings"may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions may affect device reliability.


Description

The Philips 80C32/87C52 is a high-performance microcontroller fabricated with Philips high-density CMOS technology. The Philips CMOS technology combines the high speed and density characteristics of HMOS 80C32/87C52 with the low power attributes of CMOS. Philips epitaxial substrate minimizes latch-up sensitivity.

The 87C52 contains an 8k * 8 EPROM and the 80C32 is ROMless. Both contain a 256 * 8 RAM, 32 I/O lines, three 16-bit counter/timers, a six-source, two-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits.

In addition, the 80C32/87C52 has two software selectable modes of power reduction-idle mode and power-down mode. The idle mode 80C32/87C52 freezes the CPU while allowing the RAM, timers, serial port, and nterrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.See 80C52/80C54/80C58 datasheet for ROM device specifications.