8761CYLF

Specifications

Temperature C Voltage 3.3 V Package TQFP 64 Speed NA Output Supply Voltage (VDDO) Output Style Min. Input Frequency Core Supply Voltage (VDD) No. of Outputs No. of Inputs Input Style Max. Output Frequency Min. Output Frequency Max. Input Frequency Temp. Grade


Description

17 LVCMOS OUT CLOCK GEN
ICS8761 Features

• Fully integrated PLL
• Seventeen LVCMOS/LVTTL outputs, 15W typical output impedance
• Selectable crystal oscillator interface or
• LVCMOS/LVTTL REF_CLK
• Maximum output frequency: 166.67MHz
• Maximum crystal input frequency: 38MHz
• Maximum REF_CLK input frequency: 83.33MHz
• Individual banks with selectable output dividers for generating 33.333MHz, 66.66MHz, 100MHz and 133.333MHz simultaneously
• Separate feedback control for generating PCI / PCI-X frequencies from a 20MHz or 25MHz crystal or 33.333MHz or 66.666MHz reference frequency
• Cycle-to-cycle jitter: 70ps (maximum)
• Period jitter, RMS: 17ps (maximum)
• Output skew: 230ps (maximum)
• Bank skew: 40ps (maximum)
• Static phase offset: 0 ± 150ps (maximum)
• Full 3.3V or 3.3V core, 2.5V multiple output supply modes
• 0°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant packages

Description
The ICS8761 is a low voltage, low skew PCI / PCI-X Clock Generator and a member of the HiPerClockS? family of High Performance Clock Solutions from ICS. The ICS8761 has a selectable REF_CLK or crystal input. The REF_CLK input accepts LVCMOS or LVTTL input levels. The ICS8761 has a fully integrated PLL along with frequency configurable clock and feedback outputs for multiplying and regenerating clocks with "zero delay". Using a 20MHz or 25MHz crystal or a 33.333MHz or 66.666MHz reference frequency, the ICS8761 will generate output frequencies of 33.333MHz, 66.666MHz, 100MHz and 133.333MHz simultaneously.

The low impedance LVCMOS/LVTTL outputs of the ICS8761 are designed to drive 50W series or parallel terminated transmission lines.