874005AGLF

DescriptionThe ICS874005 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator ICS874005 may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The ICS874005 has 3 PLL bandwidth modes: 200kHz, 400kHz, and 800kHz. The 200KHz mode will pro-vide maximum jitter attenuation, but with higher PLL tracking skew and spread spectrum modulation from the motherboard synthesizer may be attenuated. The 400kHz provides an intermediate bandwidth that can easily track triangular spread profiles, while providing good jitter attenuation. The 800kHz bandwidth provides the best tracking skew and will pass most spread profiles, but the jitter attenuation will not be as good as the lower bandwidth modes. Because some 2.5 Gb serdes have x20 multipliers while others have than x25 multipliers, the ICS874005 can be set for 1:1 mode or 5/4 multiplication mode (i.e. 100MHz input/125MHz output) using the F_SEL pins.

The ICS874005 uses ICS 3rd Generation FemtoClockTM PLL technology to achive the lowest possible phase noise. The ICS874005 is packaged in a 24 Lead TSSOP package, making it ideal for use in space constrained applications such as PCI Expressadd-in cards.