87016AYLFT

Specifications

Temperature C Voltage 3.3 V Package TQFP 48 Speed NA No. of Inputs No. of Outputs Max. Input Frequency Core Supply Voltage (VDD) Output Supply Voltage (VDDO) Output Style Min. Output Frequency Min. Input Frequency Input Style Max. Output Frequency Temp. Grade Divide Value


Description

16 LVCMOS OUT BUFFER/DIVIDER
ICS87016 Features

• Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs)
• Selectable differential CLK1, nCLK1 or LVCMOS clock input
• CLK1, nCLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• CLK0 supports the following input types: LVCMOS, LVTTL
• Maximum output frequency: 250MHz
• Independent bank control for ÷1 or ÷2 operation
• Independent output bank voltage settings for
• 3.3V, 2.5V, or 1.8V operation
• Asynchronous clock enable/disable
• Output skew: 170ps (maximum)
• Bank skew: 30ps (maximum)
• Part-to-part skew: 750ps (maximum)
• 3.3V core, 3.3V, 2.5V, or 1.8V output operating supply
• 0°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant packages

Description
The ICS87016 is a low skew, 1:16 LVCMOS/LVTTL Clock Generator and is a member of the HiPerClockS family of High Performance Clock Solutions. The ICS87016 has 4 banks of 4 outputs and each bank can be independently selected for 1 or 2 frequency operation. Each bank also has its own power supply pins so that the banks can operate at the following different voltage levels: 3.3V, 2.5V, and 1.8V. The low impedance LVCMOS/LVTTL outputs are designed to drive 50W series or parallel terminated transmission lines.

The divide select inputs, DIV_SELA:DIV_SELD, control the output frequency of each bank. The output banks can be independently selected for 1 or 2 operation. The bank enable inputs of ICS87016, CLK_ENA:CLK_END, support enabling and disabling each bank of outputs individually. The CLK_ENA:CLK_END circuitry has a synchronizer to prevent runt pulses when enabling or disabling the clock outputs. The master reset input, nMR/OE, resets the ?1/?2 flip flops and also controls the active and high impedance states of all outputs. This pin of ICS87016 has an internal pull-up resistor and is normally used only for test purposes or in systems which use low power modes.

The ICS87016 is characterized to operate with the core at 3.3V and the banks at 3.3V, 2.5V, or 1.8V. Guaranteed bank, output, and part-to-part skew characteristics make the 87016 ideal for those clock applications demanding well-defined performanceand repeatability.