845GL Selling Leads, Price trend, 845GL DataSheet download, circuit diagram from SeekIC.com

Features: Host Interface Support * One processor in a mPGA478 package * Hyper-Threading Technology support * 400/533 MHz PSB (100/133 MHz bus clock) * PSB Dynamic Bus Inversion on the data bus * 32-bit addressing for access to 4 GB of memory space * 8 deep In Order Queue * AGTL+ On-die Termination...

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SeekIC No. : 004256290 Detail

845GL: Features: Host Interface Support * One processor in a mPGA478 package * Hyper-Threading Technology support * 400/533 MHz PSB (100/133 MHz bus clock) * PSB Dynamic Bus Inversion on the data bus * 32-...

845GL Data Sheet

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Part Number:: 845GL
Supply Ability:: 5000

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1~5000

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Negotiable

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15 Days

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Upload time: 2024/12/21

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Product Details

Description

Features:

Host Interface Support
   * One processor in a mPGA478 package
   * Hyper-Threading Technology support
   * 400/533 MHz PSB (100/133 MHz bus clock)
   * PSB Dynamic Bus Inversion on the data bus
   * 32-bit addressing for access to 4 GB of memory space
   * 8 deep In Order Queue
   * AGTL+ On-die Termination
System Memory Controller (SDR and DDR)
   -One, 64-bit wide SDR or DDR SDRAM data channel
   -Bandwidth up to 1 GB/s (SDR), and 2.1 GB/s (DDR266)
   -Configurable to support either a DDR board or an SDR board
   -64-Mb, 128-Mb, 256-Mb, and 512-Mb SDRAM technologies
   -Supports only x8 and x16 SDRAM devices with four banks
   -Unbuffered, unregistered 184-pin non-ECC DDR SDRAM DIMMs only
   -Opportunistic refresh
   -Up to 16, simultaneously open pages
   -SPD (Serial Presence Detect) scheme for DIMM detection
   -Suspend-to-RAM support using CKE
   -Double Data Rate (DDR) SDRAM Configuration
      - Up to 2.0 GB of 200 MHz or 266 MHz DDR SDRAM
      - Two DDR DIMMs, single-sided and/or double-sided
      - DDR200/266 unregistered, 184-pin non-ECC DDR SDRAM DIMMs
      - JEDEC DDR DIMM specification configurations only
      - Does not support double-sided x16 DDR DIMMs
      - Selective Command-Per-Clock (selective CPC) accesses.
   -Single Data Rate (SDR) SDRAM Configuration
      - Up to 2.0 GB of 133 MHz SDR SDRAM
      - Up to two SDR DIMMs, single-sided and/or double-sided
      - PC133 unregistered 168-pin non-ECC SDR SDRAM DIMMs
      - Does not support PC100
      - Mixed-mode/uneven double-sided SDR DIMMs not supported
      - 3.3 V SDR DIMM configurations only
AGP Interface
   -Supports a single 1.5 V Accelerated Graphics Port Interface, Specification 2.0-compliant device
   -Supports 1X/2X/4X data transfers and 2X/4X Fast Writes
   -32-deep AGP request queue
   -AGP signals muxed with two Intel^(R)DVO ports: Supports ADD cards
Integrated Graphics
   -Core Frequency of 200 MHz
   -3D Setup and Render Engine
      - Discrete Triangles, Strips and Fans Support
      - Indexed Vertex and Flexible Vertex Formats
      - Pixel Accurate Fast Scissoring and Clipping Operation
      - Backface Culling Support
      - Supports D3D and OGL Pixelization Rules
      - Anti-Aliased Lines Support
      - Sprite Points Support
   -High Quality Texture Engine (see Section1.4.5)
   -3D Graphics Rasterization Enhancements (see Section1.4.5)
   -2D Graphics (see Section1.4.5)
   -Video DVD/PC-VCR (see Section1.4.5)
   -Video Overlay (see Section1.4.5)
Analog Display Support
   -350 MHz Integrated 24-bit RAMDAC
   -Up to 2048x1536 at 60Hz refresh
   -Hardware Color Cursor Support
   -DDC2B Compliant Interface
Digital Display Channels
   -Two channels multiplexed with AGP
   -165 MHz dot clock on each 12-bit interface
   -Can combine two, 12-bit channels to form one 24-bit interface: Supports flat panels up to 2048x1536 at 60 Hz
       or dCRT/HDTV at 1920x1080 at 85 Hz -Supports Hot Plug and Display
   -Supports LVDS, TMDS transmitters or TV-out encoders
   -ADD card utilizes AGP connector
   -Three Display Control interfaces (I2C/DDC) multiplexed on AGP
Hub Interface
   -Supports Hub Interface 1.5
   -266 MB/s point-to-point Hub Interface to the ICH4
   -66 MHz base clock
   -1.5 V operation GMCH Package
   -37.5 mm x 37.5 mm FC-BGA package with 1 mm ball pitch

Specifications

Symbol	Parameter	Min	Max	Unit
T_die	Die Temperature under Bias	0	97
T_storage	Storage Temperature	-55	150
VCC1_5	1.5 V Supply Voltage with respect to V_SS	-0.3	1.75	V
VTT	AGTL+ buffer DC input voltage with respect to V_SS	-0.3	1.75	V
VCCSM(DDR)	2.5 V DDR Supply Voltage with respect to V_SS	-0.3	3	V
VCCSM(SDR)	3.3 V Supply Voltage with respect to V_SS	-0.3	3.6	V

845GL

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