83C795

Features: T he bas ic features of the 83C795 chip are summarized here:· Memory caching with time-shared access to buffer RAM.· Compliant with the ISA Plug And Play specification· Software compatible with 83C790 drivers· Direct interface with ISA bus without TTL buffers· I/O-mapped pipe access to b...

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SeekIC No. : 004255937 Detail

83C795: Features: T he bas ic features of the 83C795 chip are summarized here:· Memory caching with time-shared access to buffer RAM.· Compliant with the ISA Plug And Play specification· Software compatible...

floor Price/Ceiling Price

Part Number:
83C795
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

T he bas ic features of the 83C795 chip are summarized here:
· Memory caching with time-shared access to buffer RAM.
· Compliant with the ISA Plug And Play specification
· Software compatible with 83C790 drivers
· Direct interface with ISA bus without TTL buffers
· I/O-mapped pipe access to buffer RAM
· Extended length option for the twisted-pair port
· Underrun detection in early receive mode
· Staggered address transfers supported
· Ring-empty bit supplied to host
· Automatic ring-wrapping
· PC-98 bus support through addition of a jumper
· Buffered 20 MHz clock output available through addition of a jumper
· Support for diskless workstations via Initial Program Load ROM
· Programmable base address and window size for buffer memory and IPL ROM
· Support for paging of buffer memory and IPL ROM
· Programmable I/O base address
· Programmable bus width of either 8 or 16 bits
· Zero wait state operation
· Automatic loading of host interface configuration and LAN address from external serial EEPROM
· Separate address and data busses to memory with no external address latches
· 7 programmable interrupt levels
· Clock oscillator
· Full 802.3 MAC layer protocol implementation with extended features
· Support for transmission and reception of frames up to 32K bytes long
· Transmit frame start at any location - no word alignment required
· Two modes of frame buffering: 83C690 mode and descriptor table mode
· Loopback modes - internal and external
· Full-duplex DMA capability in loopback mode
· Built-in AUI serial interface including drivers and receivers





Pinout

  Connection Diagram


Specifications

Supply Voltage (Vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
TTL Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . 0 5.5V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 5.5V
Differential Output Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 16V
Differential Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C (-85°F) to 150°C (302°F)
Absolute maximum ratings indicate limits beyond which permanent damage may occur. Continuous operating at thes e limits is not recommended; operation should be limited to conditions specified under "DC Operating Characteris tics ."





Description

T he SMC 83C795 E thernet S ys tem Controller implements the IEEE 802.3 protocol for networks such as E thernet, Cheapernet, and 10BaseT. It is a highly integrated device that shrinks the es sence of a LAN adapter card onto a s ingle piece of s ilicon.

It includes the 802.3 Media Access Control (MAC) functions, the Phys ical Layer Interface (PLI) for 10BAS E -T media, and a hos t interface des igned for s imple connection to the Indus try S tandard Architecture (ISA) PC/AT bus. To create a LAN adapter only the 83C795, a single buffer RAM, an E E ROM chip, and an optional ROM for B IOS or IPL code s torage are required.

T ransformers and supporting analog components complete an adapter des ign. All necessary control logic is provided by the 83C795. T he resulting LAN adapter appears to the hos t as a block of I/O regis ters with a block of shared memory, unles s the I/O pipe is used.

T he base address for I/O regis ters is programmable as is the base addres s and s ize of the buffer memory. This device is similar to the SMC 83C790 LAN controller with three major differences: ` A small memory cache has been added for host accesses to shared memory. ` An I/O pipe mode has been added to access the buffer memory. ` Auto-configurability logic has been added in order to comply with the new ISA Plug and Play specification. As with the 83C790 chip, there are two basic modes of operation: normal and ALT EGO.

In the normal mode, the LAN controller operates much like the 83C690 LAN Controller with received frames being buffered in a ring of contiguous , fixed-s ize buffers .

When the ALT EGO feature is enabled, the device switches to a very different mode of operation. T he differences are summarized here and explained in detail throughout the specification:

1. Linked-list style of buffering instead of ring buffers.

2. Different register map for LAN controller, exposing new registers for the linked-list buffering.

Figure 1-1 depicts the 83C795's functionality.






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