83C694D

Features:

* Twisted-Pair interface solution for IEEE 802.3 10BaseT Standard
* Compatible with Ethernet II (10BASE5) and Cheapernet (10BASE2) IEEE 802.3 Stand-ards
* Smart Squelch^(C)  digital noise filter at receive and collision inputs to reject noise and digital noise on twisted-pair receive inputs.
* Direct connection to the transceiver (AUI) cable
* 16V fault protection at the AUI transmitter in-terface
* 10 Mbps Manchester encoding/ decoding withreceive clock recovery
* Low power, 1.25 CMOS technology
* TTL/MOS-compatible controller interface
* Externally-selectable half- or full-step modesof operation at AUI TX± outputs
* Loopback capability for diagnostics
* Single station interface operation
* Link test generation and digital equalization for twisted-pair transmitter
* Automatic phase detection
* AUI/TP autoselect
* Built-in LED drivers for transmit, receive, link test and polarity status indicators


Pinout




Specifications

Supply Voltage (Vcc). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
TTL Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  0 5.5V
Differential Input Voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 5.5V
Differential Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  0 16V
Differential Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  -40 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . .  .  . . .-65 (-85) to 150° (302)

Absolute maximum ratings indicate limits beyond which permanent damage may occur.  Continuous operation at these limits is not recommended; operation should be limited to conditions specified under DC Operating Characteristics.


Description

The 83C694D is used for applications where Twisted-Pair Interface (TPI) and/or Attachment Unit Interface (AUI) functions are required.  Its two main functions are to:

1. Receive a digital data stream from a low-level input signal and
2. Convert a digital output data stream into an analog high-current signal for transmission across a network cable.

This means that the 83C694D serves as the logical link between a network cable on one end and a digital controller chip (such as the 83C690) on the other end.

To accomplish these two functions, the 83C694D consists of these components: Manchester en-coder/decoder, balanced drivers and receivers, on-board crystal oscillator, signal translator, diagnostic circuit, and protocol timers and state machines.

The remainder of this data sheet 83C694D contains the following information:Section 2 discusses the system architecture in-
cluding an explanation of all chip circuits. Section 3 provides pin descriptions. Section 4 provides DC Operating Characteristics. Section 5 provides AC Operating Characteristics including Interface Timing diagrams. Section 6 provides the PLCC package diagram of this chip.