Features: SpecificationsDescriptionThe 83C51FC has the following features including 80C51 central processing unit;Once (On Circuit Emulation) Mode;Fve package styles;OTP package available;32k x 8 ROM (83C51 FC);256 x 8 RAM, expandable extematly to 64k bytes. The 83C51FC(hereafter CoIleUively call...
83C51FC: Features: SpecificationsDescriptionThe 83C51FC has the following features including 80C51 central processing unit;Once (On Circuit Emulation) Mode;Fve package styles;OTP package available;32k x 8 RO...
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The 83C51FC has the following features including 80C51 central processing unit;Once (On Circuit Emulation) Mode;Fve package styles;OTP package available;32k x 8 ROM (83C51 FC);256 x 8 RAM, expandable extematly to 64k bytes.
The 83C51FC(hereafter CoIleUively called SXCSi FCj Single-Chip 8-t3it Microcontroller is manufactured in an advanced CMOS process and is a derivaEive of the 80C51 microcontroller family. The 8XC51FC has the same instruction set as the 80C51.This device provides architectural enhancements that make it applicable in a variety of applications for general Control systems. The 87CSt FC contains 32k x 8 EPROM memory, the 83C51 FC contains 32k x 8 ROM memory, a vofatite 256 x 8 road'write data memory, four 8-bit 1/O ports,three 16-bit timer,}event counters, a Programmab}e Counter Array (PCA), a mufti-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip ostinator and timing circuits. For systems ttrat require extra capability, the 8XC51 FG can be expanded using standard TTI. compatible memories and logic.Its added features make it an even more powerful microcontrotler for applications that require pulse width modulation, high-speed IIO_and up}down counting capabilities such as motor control. It also has a more versatile serial channel that facilitates multiprocessor communications.
In the idle mode, the CPU puts itself to sleep while all of the on-chip peripherals stay active.The instruction to invoke the idle mode is the Last instruction executed in the normal operating mode before the idle mode is activated. The CPU contents, the on-chip RAM, and all of the special function registers remain intact during this mode. The idle mode can be terminated either by any enabled intemapt (at which time the process is picked up at the interrupt service routine and continued), or by a hardware reset which starts the processor in the same manner as a power-on reset.There are two additional registers associated with each of the PCA modules. They are CCAPnH and CCAPnL and these are the registers that store the 1 &bit count when a capture occurs or a compare should occur. When a module is used in the PWM mode these registers are used to control the duty cycle of the output.