83940DYLF

• 18 LVCMOS/LVTTL outputs
• Selectable LVCMOS_CLK or LVPECL clock inputs
• PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL
• LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL
• Maximum output frequency: 250MHz
• Output skew: 150ps (maximum)
• Part to part skew: 750ps (maximum)
• Jitter, RMS: < 0.03ps (typical)
• Full 3.3V and 2.5V or mixed 3.3V core, 2.5V output supply modes
• 0°C to 70°C ambient operating temperature

Description
The ICS83940D is a low skew, 1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS? family of High Performance Clock Solutions from IDT. The ICS83940D has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50W series or parallel terminated transmission lines.

The ICS83940D is characterized at full 3.3V and 2.5V or mixed 3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the ICS83940D ideal for those clock distribution applications demanding well defined performance and repeatability.