Features: • On-chip ROM correction function
• Inherits peripheral functions of mPD78078Y Subseries
• Minimum instruction execution time 160 ns
(@ fXX = 12.5 MHz operation with main system clock) 61 ms
(@ fXT = 32.768 kHz operation with subsystem clock)
• Internal high-capacity memory
· ROM: 256 KB
· RAM: 12,800 bytes
• I/O ports: 86
• Timer/counters: 16-bit timer/event counter ×1 unit 8-bit timer/event counter× 6 units
• Serial interfaces: 3 channels UART/IOE (3-wire serial I/O): 2 channels CSI (3-wire serial I/O, multi-master supporting I2C busNote): 1 channel
• Standby function HALT/STOP/IDLE mode In power-saving mode: HALT/IDLE mode (with subsystem clock)
• Clock division function
• Watch timer: 1 channel
• Watchdog timer: 1 channel
• Clock output function Selectable from fXX, fXX/2, fXX/22, fXX/23, fXX/24, fXX/25, fXX/26, fXX/27, fXT
• Buzzer output function Selectable from fXX/210, fXX/211, fXX/212, fXX/213
• A/D converter: 8-bit resolution ×8 channels
• D/A converter: 8-bit resolution × 2 channels
• Supply voltage: VDD = 2.2 to 5.5 VPinout
Specifications
| Parameter |
Symbol |
Conditions |
Ratings |
Unit |
| Supply voltage |
VDD |
|
0.3 to +6.5 |
V |
| AVDD |
|
0.3 to VDD + 0.3 |
V |
| AVSS |
|
0.3 to VSS + 0.3 |
V |
| AVREF0 |
A/D converter reference voltage input |
0.3 to VDD + 0.3 |
V |
| AVREF1 |
D/A converter reference voltage input |
0.3 to VDD + 0.3 |
V |
| Input voltage |
VI1 |
Other than P90 to P95 |
0.3 to VDD + 0.3 |
V |
| VI2 |
P90 to P95 |
N-ch open drain |
0.3 to +12 |
V |
| Analog input voltage |
VAN |
Analog input pin |
AVSS 0.3 to AVREF0 + 0.3 |
V |
| Output voltage |
VO |
|
0.3 to VDD + 0.3 |
V |
| Output current, low |
IOL |
Per pin |
15 |
mA |
| Total of P2, P4 to P8 |
75 |
mA |
| Total of P0, P3, P9, P10, P12, P13 |
75 |
mA |
| Output current, high |
IOH |
Per pin |
10 |
mA |
| Total of P2, P4 to P8 |
50 |
mA |
| Total of P0, P3, P9, P10, P12, P13 |
50 |
mA |
Operating ambient
temperature |
TA |
|
40 to +85 |
°C |
| Storage temperature |
Tstg |
|
65 to +150 |
°C |
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded.
DescriptionThe 784218Y is a member of the mPD784218 Subseries of the 78K/IV Series. In addition to a high-speed and high-performance CPU, the mPD784218 incorporates a variety of peripheral hardware such as ROM, RAM, I/O ports, 8-bit resolution A/D and D/A converters, timers, serial interfaces, real-time output ports, and an interrupt function.
The PD784218Y Note is the PD784218 Subseries with a multi-master supporting I2C bus interface added.
Flash memory versions, the 784218Y, which can operate in the same voltage range as the mask ROM versions, and various development tools are also available.
784218Y Data Sheet
