75P52100

Features: ` Full Ternary 64K x 72 bit content addressable memory` Upgradeable to 128K x 72 NSE` Power Management` Global Mask Registers` Segments individually configurable` 36/72/144/288/576 multiple width lookups` 100M sustained lookups per second at 72 and 144 width lookups` Burst write for high...

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75P52100 Picture
SeekIC No. : 004252247 Detail

75P52100: Features: ` Full Ternary 64K x 72 bit content addressable memory` Upgradeable to 128K x 72 NSE` Power Management` Global Mask Registers` Segments individually configurable` 36/72/144/288/576 multipl...

floor Price/Ceiling Price

Part Number:
75P52100
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

` Full Ternary 64K x 72 bit content addressable memory
` Upgradeable to 128K x 72 NSE
` Power Management
` Global Mask Registers
` Segments individually configurable
` 36/72/144/288/576 multiple width lookups
` 100M sustained lookups per second at 72 and 144 width lookups
` Burst write for high speed table updates
` Multi-match
` Learn new entries
` Dual bus interface
` Cascadable to 8 devices with no glue logic or latency penalty
` Glueless interface to standard ZBT™ or
  Synchronous Pipelined Burst SRAMs
` Boundary Scan JTAG Interface (IEEE 1149.1compliant)
` 1.8V core power supply
` 2.5V VBIAS power supply
` User selectable 2.5V or 1.8V I/O supply



Description

IDT provides proven of the 75P52100 , industry-leading network search engines (NSEs) and a comprehensive suite of software that enable and accelerate the intelligent processing of network services in communications equipment. As a part of the complete IDT classification subsystem that includes content inspection engines, the IDT family of NSEs delivers highperformance, feature-rich, easy-to-use, integrated search accelerators.

The IDT 75P52100 NSE is a high performance pipelined low-power, synchronous full-ternary 64K x 72 entry device. Each entry location in the NSE has both a Data entry and an associated Mask entry. The NSE devices integrate content addressable memory (CAM) technology with high-performance logic. The device can perform Lookup and Learn NSE
operations plus Read, Write, Burst Write, and Dual Write maintenance operations.

The IDT 75P52100 NSE device has a bi-directional bus that is a multiplexed address and data bus that can support 100 million sustained searches per second. This device provides array segments which can be configured to enable multiple width lookups from 36 to 576 bits wide. The IDT 75P52100 requires a 1.8-volt VDD supply, a user selectable 1.8
or 2.5-volt VDDQ supply, and a 2.5-volt VBIAS supply. This NSE device provides the user with flexibility and control in determining the device power. Only the array segments that will be used for a specific NSE operation are powered up while the unused segments are not.

The IDT 75P52100 utilizes IDT's latest high-performance 1.8V CMOS processing technology and is packaged in a JEDEC Standard, thermally enhanced, low profile Ball Grid Array. The options include a 304 BGA, satisfying smaller footprint requirements and a 372 BGA package that is compatible with IDT's 32K x 72 Entry (75P42100) and 128K x 72 Entry (75P62100) NSE devices.




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