74VCXR162601

Supply Voltage (V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . -0.5V to +4.6V
DC Input Voltage (V_I) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . -0.5V to +4.6V
Output Voltage (V_O)
Outputs 3-STATE . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V
Outputs Active (Note 6) . . . . . . . .. . . . . . . . . . . . . . . . . . . . .. . . . . . -0.5V to V_CC + 0.5V
DC Input Diode Current (IIK)
VI < 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA
DC Output Diode Current (IOK)
VO < 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . .. . . . . . . . .-50 mA
VO > V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +50 mA
DC Output Source/Sink Current (IOL/IOL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
DC V_CC or Ground Current per . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .±100 mA
Supply Pin (I_CC or Ground)
Storage Temperature Range (Tstg) . . . . . . . . . . . . . . . . . . . . . . . .  . . .-65°C to +150°C

The 74VCXR162601, 18-bit universal bus transceiver, combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction of the 74VCXR162601 is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to-LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. Output-enable OEAB is active-LOW. When OEAB is HIGH, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CLKBA and CLKENBA.

The 74VCXR162601 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V.

The 74VCXR162601 is also designed with 26W series resistors on both the A and B Port outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.