74VCX16821

Features:

· 1.2V to 3.6V VCC supply operation
· 3.6V tolerant inputs and outputs
· t_PD
  3.5 ns max for 3.0V to 3.6V V_CC
· Power-off high impedance inputs and outputs
· Static Drive (IOH/IOL)
  ±24 mA @ 3.0V V_CC
· Uses patented Quiet Series? noise/EMI reduction circuitry
· Latch-up performance exceeds 300 mA
· ESD performance:
  Human body model > 2000V
  Machine model > 200V


Pinout




Specifications

Supply Voltage (V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . -0.5V to +4.6V
DC Input Voltage (V_I) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . -0.5V to +4.6V
Output Voltage (V_O)
Outputs 3-STATE . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V
Outputs Active (Note 3) . . . . . . . .. . . . . . . . . . . . . . . . . . . . .. . . . . . -0.5V to VCC + 0.5V
DC Input Diode Current (IIK)
VI < 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA
DC Output Diode Current (IOK)
VO < 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . .. . . . . . . . .-50 mA
VO > V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +50 mA
DC Output Source/Sink Current (IOL/IOL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
DC V_CC or Ground Current per . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .±100 mA
Supply Pin (I_CC or Ground)
Storage Temperature Range (Tstg) . . . . . . . . . . . . . . . . . . . . . . . .  . . .-65°C to +150°C

Description

The 74VCX16821 contains twenty non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications.

The 74VCX16821 is designed for low voltage (1.4V to 3.6V) V_CC applications with I/O compatibility up to 3.6V.

The 74VCX16821 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.