74V2G74

PinoutSpecifications Symbol Parameter Value Units VCC Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage (see note 2) -0.5 to VCC + 0.5 V IIK DC Input Diode Current -20 mA IOK ...

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74V2G74 Picture
SeekIC No. : 004251766 Detail

74V2G74: PinoutSpecifications Symbol Parameter Value Units VCC Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage (...

floor Price/Ceiling Price

Part Number:
74V2G74
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Symbol

Parameter

Value

Units

VCC

Supply Voltage

-0.5 to +7.0

V

VI

DC Input Voltage

-0.5 to +7.0

V

VO

DC Output Voltage (see note 2)

-0.5 to VCC + 0.5

V

IIK

DC Input Diode Current

- 20

mA

IOK

DC Output Diode Current

- 20

mA

IO

DC Output Current

± 25

mA

ICC or IGND

DC VCC or Ground Current

± 50

mA

Tstg

Storage Temperature

-65 to +150

°C

TL

Lead Temperature (10 sec)

300

°C




Description

The 74V2G74 is an advanced high-speed CMOS SINGLE D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.

A signal on the D INPUT is transfered to the Q and Q OUTPUTS during the positive going transition of the clock pulse.

CLEAR and PRESET are independent of the clock and accomplished by a low setting on the appropriate input.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

All inputs and outputs of the 74V2G74 are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.




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