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74V1G77

Features: ` HIGH SPEED: tPD = 4.4ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 1A(MAX.) at TA=25` HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)` POWER DOWN PROTECTION ON INPUTS`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V` BALANCED PROPAGATION DELAYS: tPLH tPHL` OP...

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SeekIC No. : 004251726 Detail

74V1G77: Features: ` HIGH SPEED: tPD = 4.4ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 1A(MAX.) at TA=25` HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)` POWER DOWN PROTECTION ON INPUTS`SYMMETRICAL...

74V1G77 Data Sheet

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Part Number:
74V1G77
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` HIGH SPEED: tPD = 4.4ns (TYP.) at VCC = 5V
` LOW POWER DISSIPATION: ICC = 1A(MAX.) at TA=25
` HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)
` POWER DOWN PROTECTION ON INPUTS
` SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
` BALANCED PROPAGATION DELAYS: tPLH  tPHL
` OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V
` IMPROVED LATCH-UP IMMUNITY


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
 Supply Voltage
-0.5 to +7.0
V
VI
 DC Input Voltage
-0.5 to +7.0
V
VO
 DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
 DC Input Diode Current
-20
mA
IOK
 DC Output Diode Current
±20
mA
IO
 DC Output Current
±25
mA
ICC or IGND
 DC VCC or Ground Current
±50
mA
Tstg
 Storage Temperature
-65 to +150
TL
 Lead Temperature (10 sec)
260
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional
operation under these conditions is not implied




Description

The 74V1G77 is an advanced high-speed CMOS SINGLE D-TYPE LATCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is designed to operate from 2V to 5.5V, making this device ideal for portable applications.

The single D-Type latch is controlled by a Latch Enable Input (LE).

While the LE input of the 74V1G77 is held at a high level, the Q output will follow the data input precisely. When the LE input is taken low the Q output is latched precisely at the logic level of D input data.

Power down protection of the 74V1G77 is provided on inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It's available in the commercial and extended temperature range.

All inputs and output of the 74V1G77 are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.




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