Features: • Edge-Triggered D-Type Inputs• Buffered-Positive Edge-Triggered Clock• Clock to Output Delays of 30 ns• Asynchronous Common Reset• True and Complement Output• Input Clamp Diodes Limit High Speed Termination EffectsPinoutDescriptionThe LSTTL/MSI 74LS17...
74LS175: Features: • Edge-Triggered D-Type Inputs• Buffered-Positive Edge-Triggered Clock• Clock to Output Delays of 30 ns• Asynchronous Common Reset• True and Complement Output...
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The LSTTL/MSI 74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when LOW.
The 74LS175 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.