74LCXZ16245

Features:

`5V tolerant inputs and outputs
`2.7V3.6V VCC specifications provided
`4.5 ns tPD max (VCC = 3.3V), 20 µA ICC max
`Power-down high impedance inputs and outputs
`Supports live insertion/withdrawal (Note 1)
`±24 mA output drive (VCC = 3.0V)
`Implements patented noise/EMI reduction circuitry
`Latch-up performance conforms to the requirements of JESD78
`ESD performance: Human body model > 2000V Machine model > 200V
`Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)


Pinout




Specifications

Symbol	Parameter	Value	Conditions	Units
VCC	Supply Voltage	−0.5 to +7.0		V
VI	DC Input Voltage	−0.5 to +7.0		V
VO	DC Output Voltage	−0.5 to +7.0 −0.5 to VCC + 0.5	Output in 3-STATE Output in HIGH or LOW State (Note 4)	V
IIK	DC Input Diode Current	−50	VI < GND	mA
IOK	DC Output Diode Current	−50 +50	VO < GND VO > VCC	mA
IO	DC Output Source/Sink Current	±50		mA
ICC	DC Supply Current per Supply Pin	±100		mA
IGND	DC Ground Current per Ground Pin	±100		mA
TSTG	Storage Temperature	−65 to +150		°C

Description

The 74LCXZ16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.7V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The device is byte controlled. Each byte has separate control inputs which could be shorted together for full 16-bit operation. The T/R inputs of the 74LCXZ16245 determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state.
When V_CC of the 74LCXZ16245 is between 0V and 1.5V, the LCXZ16245 is on the high impedance state during power-up or power-down.
This places the outputs in the high impedance (Z) state preventing intermittent low impedance loading or glitching in bus oriented applications.
The 74LCXZ16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.