74FR900

Features:

9-bit data ports for systems carrying parity bits
Readback capability for system self checks.
Independent control lines for maximum flexibility
Guaranteed multiple output switching and 250 pF load delays
Outputs optimized for dynamic bus drive capability
PINV parity control facilitates system diagnostics
FR25900 resistor option for driving MOS inputs such as DRAM arrays


Pinout




Specifications

Storage Temperature .......................................... -65°C to +150°C
Ambient Temperature under Bias ........................ -55°C to +125°C
Junction Temperature under Bias ........................ -55°C to +150°C
V_CC Pin Potential to Ground Pin .......................... -0.5V to +7.0V
Input Voltage (Note 3) ........................................ -0.5V to +7.0V
Input Current (Note 3) ........................................ -30 mA to +5.0 mA
Voltage Applied to Output
  in HIGH State (with V_CC = 0V)
  Standard Output .............................................. -0.5V to V_CC
  3-STATE Output ................................................ -0.5V to +5.5V
Current Applied to Output
  in LOW State (Max) .......................................... twice the rated I_OL (mA)
ESD Last Passing Voltage (Min) ......................... 4000V


Description

The 74FR900 is a data bus multiplexer routing any of three 9-bit ports to any other one of the three ports. Readback of data latched from any port onto itself is also possible. The 74FR900 maintains separate control of all latch-enable, output enable and select inputs for maximum flexibility. PINV allows inversion of the data from the C₈ to A₈ or B₈ path. This is useful for control of the parity bit in systems diagnostics.

Fairchild's 74FR900 includes 25W resistors in series with port A and B outputs. Resistors minimize undershoot and ringing which may damage or corrupt sensitive device inputs driven by these ports.