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74FR543

Features: *Functionally equivalent to 74F543*Back-to-back registers for storage*Bidirectional data path*A and B outputs have current sourcing capability of 15mA and current sinking capability of 64mA*Separate controls for data flow in each direction*Guaranteed pin-to-pin skew*Guaranteed 4000V mini...

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SeekIC No. : 004250622 Detail

74FR543: Features: *Functionally equivalent to 74F543*Back-to-back registers for storage*Bidirectional data path*A and B outputs have current sourcing capability of 15mA and current sinking capability of 64m...

74FR543 Data Sheet

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Part Number:
74FR543
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

*Functionally equivalent to 74F543
*Back-to-back registers for storage
*Bidirectional data path
*A and B outputs have current sourcing capability of
  15mA and current sinking capability of 64mA
*Separate controls for data flow in each direction
*Guaranteed pin-to-pin skew
*Guaranteed 4000V minimum ESD protection


Pinout

Connection Diagram


Specifications

Storage Temperature.........................−65°C to +150°C
Ambient Temperature under Bias ......−55°C to +125°C
Junction Temperature under Bias.......−55°C to +150°C
VCC Pin Potential to Ground Pin ...............−0.5V to +7.0V
Input Voltage (Note 2) .............................−0.5V to +7.0V
Input Current (Note 2) .......................−30 mA to +5.0 mA
Voltage Applied to Output
   in HIGH State (with VCC = 0V)
   Standard Output ........................................−0.5V to VCC
   3-STATE Output ......................................−0.5V to +5.5V
Current Applied to Output
   in LOW State (Max) ..................Twice the Rated IOL (mA)
ESD Last Passing Voltage (Min) ...............................4000V


Description

    The 74FR543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs of the 74FR543 are provided for each register to permit independent con-trol of inputting and outputting in either direction of data flow. Both the A and B outputs will source 15 mA and sink 64 mA.




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