Features: *Guaranteed 4000V minimum ESD protectionPinoutSpecificationsStorage Temperature........................... −65°C to +150°CAmbient Temperature under Bias......... −55°C to +125°CJunction Temperature under Bias......... −55°C to +150°CVCC Pin Potential to Ground Pin ........
74F74: Features: *Guaranteed 4000V minimum ESD protectionPinoutSpecificationsStorage Temperature........................... −65°C to +150°CAmbient Temperature under Bias......... −55°C to +125°...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
The 74F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering of the 74F74 occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input of the 74F74 is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.