Features: *ndependent registers for A and B buses*Multiplexed real-time and stored data*Choice of non-inverting and inverting data paths-'F651 inverting-'F652 non-inverting*Guaranteed 4000V minimum ESD protectionPinoutSpecificationsStorage Temperature .........................−65°C to +150°C...
74F652: Features: *ndependent registers for A and B buses*Multiplexed real-time and stored data*Choice of non-inverting and inverting data paths-'F651 inverting-'F652 non-inverting*Guaranteed 4000V minimum ...
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The 74F652 consist of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers. Data of the 74F652 on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function.