74F647

    The 74F647 and 74F649 Transceivers/Registers consist of bus transceiver circuits with open-collector outputs, Dtype flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a High logic level. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode of the 74F647, data present at the high impedance port may be stored in either the A or B register or both.

    The select (SAB, SBA) controls of the 74F647 can multiplex stored and real-time (transparent mode) data. The DIR determines which bus will receive data when the Output Enable, OE is active Low. In the isolation mode (Output Enable, OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register.

    When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74F647 and 74F649.