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74F378

Features: • 6-bit high-speed parallel register• Positive edge-triggered D-type inputs• Fully buffered common Clock and Enable inputs• Input clamp diodes limit high speed termination effects• Fully TTL and CMOS compatiblePinoutSpecifications SYMBOL PARAMETER ...

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SeekIC No. : 004249759 Detail

74F378: Features: • 6-bit high-speed parallel register• Positive edge-triggered D-type inputs• Fully buffered common Clock and Enable inputs• Input clamp diodes limit high speed term...

74F378 Data Sheet

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Part Number:
74F378
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 6-bit high-speed parallel register
• Positive edge-triggered D-type inputs
• Fully buffered common Clock and Enable inputs
• Input clamp diodes limit high speed termination effects
• Fully TTL and CMOS compatible


Pinout

Connection Diagram


Specifications

SYMBOL
PARAMETER
RATING
UNIT
VCC Supply voltage
0.5 to +7.0
V
VIN Input voltage
0.5 to +7.0
V
IIN Input current
30 to +5
mA
VOUT Voltage applied to output in high output state
0.5 to VCC
V
IOUT Current applied to output in low output state
40
mA
Tamb Operating free air temperature range
0 to +70
°C
Tstg Storage temperature range
65 to +150
°C



Description

The 74F378 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.

The register of the 74F378 is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transformed to the corresponding flop-flop's Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.




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