Features: • Combines demultiplexer and 8-bit latch• Serial-to-parallel capability• Output from each storage bit available• Random (addressable) data entry• Easily expandable• Common reset input• Useful as 1-of-8 active-High decoderPinoutSpecifications ...
74F259: Features: • Combines demultiplexer and 8-bit latch• Serial-to-parallel capability• Output from each storage bit available• Random (addressable) data entry• Easily expan...
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SYMBOL |
PARAMETER |
RATING |
UNIT |
VCC |
Supply voltage |
0.5 to +7.0 |
V |
VIN |
Input voltage |
0.5 to +7.0 |
V |
IIN |
Input current |
30 to +5 |
mA |
VOUT |
Voltage applied to output in High output state |
0.5 to VCC |
V |
IOUT |
Current applied to output in Low output state |
40 |
mA |
Tamb |
Operating free-air temperature range |
0 to +70 |
°C |
Tstg |
Storage temperature range |
65 to +150 |
°C |
The 74F259 addressable latch has four distinct modes of operation which are selectable by controlling the Master Reset (MR) and Enable (E) inputs (see Function Table). In the addressable latch mode, data at the Data inputs is written into the addressed latches. The addressed latches will follow the Data input with all unaddressed latches remaining in their previous states. In the store mode, all latches remain of the 74F259 in their previous states and are unaffected by the Data or Address inputs. To eliminate the possibility of entering erroneous data in the latches, the enable should be held High (inactive) while the address lines are changing. In the 1-of-8 decoding or demultiplexing mode (MR=E=Low), addressed outputs will follow the level of the Data input, with all other outputs Low. In the Master Reset mode, all outputs are Low and unaffected by the Address and Data inputs.