74F2373

The 74F2373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates. The 30 Ohm series termination on the outputs reduces over/undershoot, making them ideal for driving DRAM The data on the D inputs is transferred to the latch outputs when the
enable (E) input of the 74F2373 is high. The latch remains transparent to the data input while E is high, and stores the data that is present one setup time before the high-to-low enable transition.

The 3-State output buffers of the 74F2373 are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.The active low output enable (OE) controls all eight 3-State buffers
independent of the latch operation. When OE is low, latched or transparent data appears at the output. When OE is high, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.