74F224

Features: • Independent synchronous inputs andoutputs• Organized as 16 words of 4 bits• DC to 50MHz data rate• 3-State outputs• Cascadable in wordwidth and depth directionPinoutDescriptionThis 64-bit active element First-In-First-Out (FIFO) is a monolithic Schottky-cl...

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74F224 Picture
SeekIC No. : 004249700 Detail

74F224: Features: • Independent synchronous inputs andoutputs• Organized as 16 words of 4 bits• DC to 50MHz data rate• 3-State outputs• Cascadable in wordwidth and depth direct...

floor Price/Ceiling Price

Part Number:
74F224
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

• Independent synchronous inputs and
outputs
• Organized as 16 words of 4 bits
• DC to 50MHz data rate
• 3-State outputs
• Cascadable in wordwidth and depth direction



Pinout

  Connection Diagram


Description

This 64-bit active element First-In-First-Out (FIFO) is a monolithic Schottky-clamped transistor-transistor logic (STLL) array organized as 16 words of 4-bits each. A memory system using the 74F224 can be easily expanded in multiples of 15m+1 words or of 4n bits, or both (where n is the number of packages in the horizontal array).

However, an external gating is required (see Figure 1). For longer words using 74F224, the IR signals of the first-rank packages and OR signals of the last-rank packages must be ANDed for proper synchronization.The 3-State outputs controlled by a single input (OE) make bus connection and multiplexing easy.

 




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