74AVCM162836

Features:

• Wide supply voltage range of 1.2 V to 3.6 V
• Complies with JEDEC standard no. 8-1A/5/7.
• CMOS low power consumption
• Input/output tolerant up to 3.6 V
• Low inductance multiple VCC and GND pins for minimum noise and ground bounce
• Integrated 15 W termination resistors to minimize output overshoot and undershoot
• Full PC133 solution provided when used with PCK2510S and CBT16292


Pinout




Specifications

Symbol	Parameter	CONDITIONS	Value	Unit
VCC	DC Supply Voltage		-0.5 to +4.6	V
IIK	DC input diode current	VI <0	50	mA
VI	DC input voltage	For all inputs1	-0.5 to +4.6	V
IOK	DC output diode current	VO >VCC or VO< 0	±50	mA
VO	DC output voltage; output 3-State	Note 1	0.5 to 4.6	V
VO	DC output voltage; output HIGH or LOW state	Note 1	-0.5 to VCC + 0.5	V
IO	DC output source or sink current	VO = 0 to VCC	± 50	mA
ICC or IGND	DC VCC or Ground Currentper		± 100	mA
Tstg	Storage temperature range		-65 to +150
PTOT	Power dissipation per package plastic thin-medium-shrink (TSSOP)	For temperature range: 40 to +125 °C above +55 °C derate linearly with 8 mW/K	600	mW

Description

The 74AVCM162836 is a 20-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).

The 74AVCM162836 is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance state of the 74AVCM162836 during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion).