74AVC16835

• Wide supply voltage range of 1.2 V to 3.6 V
• Complies with JEDEC standard no. 8-1A/5/7.
• CMOS low power consumption
• Input/output tolerant up to 3.6 V
• DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation
• Low inductance multiple VCC and GND pins for minimum noise and ground bounce
• Power off disables 74AVC16835 outputs, permitting Live Insertion

The 74AVC16835 is a 18-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).

This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance state of the 74AVC16835 during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry of the 74AVC16835 is implemented to support termination line drive during transient. See the graphs on page 8 for typical curves.