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74AVC16374

Features: · Wide supply voltage range from 1.2 to 3.6 V· Complies with JEDEC standard no. 8-1A/5/7· CMOS low power consumption· Input/output tolerant up to 3.6 V· DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation· ...

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SeekIC No. : 004249562 Detail

74AVC16374: Features: · Wide supply voltage range from 1.2 to 3.6 V· Complies with JEDEC standard no. 8-1A/5/7· CMOS low power consumption· Input/output tolerant up to 3.6 V· DCO (Dynamic Controlled Output) cir...

74AVC16374 Data Sheet

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Part Number:
74AVC16374
Supply Ability:
5000

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Product Details

Description



Features:

· Wide supply voltage range from 1.2 to 3.6 V
· Complies with JEDEC standard no. 8-1A/5/7
· CMOS low power consumption
· Input/output tolerant up to 3.6 V
· DCO (Dynamic Controlled Output) circuit dynamically changes  output
    impedance, resulting in noise reduction without speed degradation
· Low inductance multiple VCC and GND pins to minimize noise and ground bounce
· Supports Live Insertion.


Pinout

Connection Diagram


Description

The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. The 74AVC16374 consist of 2 sections of eight edge triggered flip-flops. A clock input (CP) and an output enable (OE) are provided per 8-bit section.

The 74AVC16374 is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, nOE should be tied to VCC through a pull-up resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry of the 74AVC16374 is implemented to support termination line drive during transient (see Figs 1 and 2).




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