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74AUP1Z125

Features: ` Wide supply voltage range from 0.8 V to 3.6 V` High noise immunity` ESD protection: ` HBM JESD22-A114-C Class 3A. Exceeds 5000 V ` MM JESD22-A115-A exceeds 200 V ` CDM JESD22-C101-C exceeds 1000 V` Low static power consumption; ICC = 0.9 mA (maximum)` Latch-up performance exceeds 100 m...

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SeekIC No. : 004249547 Detail

74AUP1Z125: Features: ` Wide supply voltage range from 0.8 V to 3.6 V` High noise immunity` ESD protection: ` HBM JESD22-A114-C Class 3A. Exceeds 5000 V ` MM JESD22-A115-A exceeds 200 V ` CDM JESD22-C101-C exce...

74AUP1Z125 Data Sheet

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Part Number:
74AUP1Z125
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Wide supply voltage range from 0.8 V to 3.6 V
` High noise immunity
` ESD protection:
   ` HBM JESD22-A114-C Class 3A. Exceeds 5000 V
   ` MM JESD22-A115-A exceeds 200 V
   ` CDM JESD22-C101-C exceeds 1000 V
` Low static power consumption; ICC = 0.9 mA (maximum)
` Latch-up performance exceeds 100 mA per JESD 78 Class II
` Inputs accept voltages up to 3.6 V
` Low noise overshoot and undershoot < 10 % of VCC
` IOFF circuitry provides partial Power-down mode operation at output Y
` Multiple package options
` Specified from -40 to +85 and -40 to +125


Pinout

Connection Diagram


Specifications

Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +4.6 V
IIK input clamping current VI < 0 V - -50 mA
VI input voltage                                      [1] -0.5 +4.6 V
IOK output clamping current VO < 0 V - -50 mA
VO output voltage                                      [1] -0.5 VCC+0.5 V
IO output current VO = 0 V to VCC - ±20 mA
ICC supply current - +50 mA
IGND ground current - -50 mA
Tstg storage temperature -65 +150
Ptot total power dissipation Tamb = -40 to +125 [2] - 250 mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SC-88 packages: above 87.5 the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 45 the value of Ptot derates linearly with 2.4 mW/K.


Description

The 74AUP1Z125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

When not in use the EN input can be driven HIGH, pulling up the X1 input and putting the device in a low power disable mode. Schmitt-trigger action at the EN input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

The 74AUP1Z125 ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

The 74AUP1Z125 is fully specified for partial Power-down applications using IOFF at output Y. The IOFF circuitry disables the output Y, preventing the damaging backflow current through the device when it is powered down.

The 74AUP1Z125 combines the functions of the 74AUP1GU04 and 74AUP1G125 to provide a device optimized for use in crystal oscillator applications.

The integration of the two devices into the 74AUP1Z125 produces the benefits of a compact footprint, lower power dissipation and stable operation over a wide range of frequency and temperature.




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