74AUP1G98

The 74AUP1G98 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The 74AUP1G98 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND

. The 74AUP1G98 has Schmitt trigger inputs making it capable of transforming slowly changing input signals into sharply defined, jitter-free output signals The inputs switch at different points for positive and negative-going signals.

The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.