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74AUP1G126

Features: · Wide supply voltage range from 0.8 V to 3.6 V· High noise immunity· Complies with JEDEC standards:· JESD8-12 (0.8 V to 1.3 V)· JESD8-11 (0.9 V to 1.65 V)· JESD8-7 (1.2 V to 1.95 V)· JESD8-5 (1.8 V to 2.7 V)· JESD8-B (2.7 V to 3.6 V)· ESD protection:· HBM JESD22-A114-C exceeds 2000 V· M...

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SeekIC No. : 004249525 Detail

74AUP1G126: Features: · Wide supply voltage range from 0.8 V to 3.6 V· High noise immunity· Complies with JEDEC standards:· JESD8-12 (0.8 V to 1.3 V)· JESD8-11 (0.9 V to 1.65 V)· JESD8-7 (1.2 V to 1.95 V)· JESD...

74AUP1G126 Data Sheet

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Part Number:
74AUP1G126
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·  Wide supply voltage range from 0.8 V to 3.6 V
·  High noise immunity
·  Complies with JEDEC standards:
·  JESD8-12 (0.8 V to 1.3 V)
·  JESD8-11 (0.9 V to 1.65 V)
·  JESD8-7 (1.2 V to 1.95 V)
·  JESD8-5 (1.8 V to 2.7 V)
·  JESD8-B (2.7 V to 3.6 V)
·  ESD protection:
·  HBM JESD22-A114-C exceeds 2000 V
·  MM JESD22-A115-A exceeds 200 V
·  CDM JESD22-C101-C exceeds 1000 V
·  Low static power consumption; ICC = 0.9 mA (maximum)
·  Latch-up performance exceeds 100 mA per JESD 78 Class II
·  Inputs accept voltages up to 3.6 V
·  Low noise overshoot and undershoot < 10 % of VCC
·  Input-disable feature allows floating input conditions


Pinout

Connection Diagram


Specifications

Symbol Parameter MIN MAX Units
VCC Supply voltage -0.5 4.6 V
VI Input voltage range(2) -0.5 4.6 V
VO output voltage active mode -0.5 VCC + 0.5 V
Power-down mode
IIK Input clamp current VI < 0V   -50 mA
IOK Output clamp current VO > VCC or VO < 0 V   ±50 mA
IO Continuous output current   ±20 mA
ICC Continuous current through VCC or GND   +50 mA
IGND ground current     -50 mA
Ptot total power Tamb = -40 °C to +125 °C
dissipation		     250 mW
TSTG Package thermal impedance(3) DBV package -65 +150 °C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.


Description

The 74AUP1G126 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

The 74AUP1G126 ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

The 74AUP1G126 is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The 74AUP1G126 provides the single non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A LOW level at pin OE causes the output to assume a high-impedance OFF-state.

The 74AUP1G126 has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input OE is LOW.




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