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74AUC1G02

Features: ` Wide supply voltage range from 0.8 to 2.7 V` Performance optimised for VCC = 1.8 V` High noise immunity` Complies with JEDEC standard: JESD76 (1.65 to 1.95 V)` 8 mA output drive (VCC = 1.65 V)` CMOS low power consumption` Latch-up performance exceeds 250 mA` ESD protection: 00 V Human ...

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SeekIC No. : 004249513 Detail

74AUC1G02: Features: ` Wide supply voltage range from 0.8 to 2.7 V` Performance optimised for VCC = 1.8 V` High noise immunity` Complies with JEDEC standard: JESD76 (1.65 to 1.95 V)` 8 mA output drive (VCC = 1...

74AUC1G02 Data Sheet

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Part Number:
74AUC1G02
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Wide supply voltage range from 0.8 to 2.7 V
` Performance optimised for VCC = 1.8 V
` High noise immunity
` Complies with JEDEC standard:
JESD76 (1.65 to 1.95 V)
` 8 mA output drive (VCC = 1.65 V)
` CMOS low power consumption
` Latch-up performance exceeds 250 mA
` ESD protection:
  00 V Human Body Model (A 114-A)
  Machine Model (A 115-A)
` 3.3 V tolerant inputs/outputs
` SC-88A and SC-74A package.


Pinout

Connection Diagram


Description

The 74AUC1G02is a high-performance, low-power, low-voltage, Si-gate CMOS device.

Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

The 74AUC1G02 is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging current backflow through the device when it is powered down.

The 74AUC1G02 provides the single 2-input NOR function.




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