Features: • 16-bit universal bus interface• 5V I/O Compatible• 3-State buffers• Output capability: +64mA/-32mA• TTL input and output switching levels• Input and output interface capability to systems at 5V supply• Bus-hold data inputs eliminate the need fo...
74ALVT16543: Features: • 16-bit universal bus interface• 5V I/O Compatible• 3-State buffers• Output capability: +64mA/-32mA• TTL input and output switching levels• Input and o...
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Buffers & Line Drivers 16-Bit Buffer/Driver With 3-State Outputs
SYMBOL | PARAMETER | CONDITIONS | RATING | UNIT |
VCC | DC supply voltage | 0.5 to +4.6 | V | |
IIK | DC input diode current | VI < 0 | 50 | mA |
VI | DC input voltage3 | -0.5 to +7.0 | V | |
IOK | DC output diode current | VO < 0 | 50 | mA |
VOUT | DC output voltage3 | Output in Off or High state | -0.5 to +7.0 | V |
IOUT | DC output current |
output in Low state |
128 |
mA |
output in High state | -64 | |||
Tstg | Storage temperature range | -65 to 150 | °C |
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
The 74ALVT16543 is a high-performance BiCMOS product designed for VCC operation at 2.5V or 3.3V with I/O compatibility up to 5V. The device can be used as two 8-bit transceivers or one 16-bit transceiver.
The 74ALVT16543 contains two sets of eight D-type latches, with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B Enable (nEAB) input and the A-to-B Latch Enable (nLEAB) input are Low, the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With nEAB and nOEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs.
Active bus-hold circuitry of the 74ALVT16543 is provided to hold unused or floating data inputs at a valid logic level.