74ALVT162731

Features:

• 5V I/O Compatible
• 3-State outputs
• Output capability: +12 mA/-12 mA
• Bus hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• Power-up reset
• Power-up 3-State
• Positive edge triggered registers
• Latch-up protection exceeds 500 mA per JEDEC JC40.2 Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per machine model
• Outputs include series resistance of 30W making external termination resistors unnecessary
• Bus hold data inputs eliminate the need for external pull-up resistors to hold unused inputs


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		-0.5 to +4.6	V
IIK	DC input diode current	VI < 0	-50	mA
VI	DC input voltage3		-0.5 to +7.0	v
IOK	DC output diode current	VO < 0	-50	mA
VOUT	DC output voltage3	Output in Off or High state	-0.5 to +7.0	V
IOUT	DC output current	Output in Low state	128	mA
		Output in High state	-64
Tstg	Storage temperature range		-65 to +150	°C

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.


Description

The 74ALVT162731 is a high-performance BiCMOS product designed for V_CC operation at 2.5V to 3.3V with I/O compatibility up to 5V.

The 74ALVT162731 is a 1-to-4 address register/driver featuring non-inverting 3-State outputs. The state of the outputs are controlled by two enable inputs (OE1 and OE2). Each enable input controls the state of two of the four common outputs for each input. When an OEn input is a logic High, the respective outputs will be in the high impedance state. When an OEn input is a logic Low, the respective outputs of the 74ALVT162731 are active. The device can be configured for a transparent mode from input to output or a register mode by the SEL input. When SEL is a logic High the device is configured for transparent mode and when SEL is a logic Low it is configured for register mode. While in the register mode the output follows the input on the rising edge of the CLK input. The function of the data registers is not effected by either SEL or OEn.

The 74ALVT162731 is designed with 30W series resistance in both the HIGH and LOW states of the output.