74ALVCH16841

The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE)control gates.When nOE is LOW, the data in the registers appears at the outputs.When nOE is High the outputs of the 74ALVCH16841 are in High-impedance OFF state.Operation of the nOE input does not affect the state of the flip-flops.The 74ALVCH16841 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level.This feature eliminates the need for external pull-up or pull-down resistors.

The unique features of the 74ALVCH16841: The first one is wide supply voltage range of 1.2V to 3.6V.The second one is complies with JEDEC standard no. 8-1A.The third one is wide supply voltage range of 1.2V to 3.6V.The forth one is CMOS low power consumption.The fifth one is direct interface with TTL levels.The sixth one is MULTIBYTETM flow-through standard pin-out architecture.The seventh one is low inductance multiple VCC and GND pins for minimum noise and ground bounce.The eighth one is current drive ±24 mA at 3.0 V,etc.

There are some absolute maximum ratings about the 74ALVCH16841. DC supply voltage range(VCC) is0.5 V to +4.6 V.DC output voltage(VO) is0.5 V to VCC +0.5 V.DC output source or sink current(IO,VO = 0 to VCC) is ±50 mA.DC VCC or GND current(IGND, ICC) is ±100 mA.Storage temperature range(Tstg) is 65°C to +150°C.