74ALVCH16245

Features:

Wide supply voltage range of 1.2V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
MULTIBYTE^tm flow-through standard pin-out architecture
Low inductance multiple V_cc  and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold (74ALVCH16245 only)
Output drive capability 50Ω transmission lines @ 85
Current drive ±24 mA at 3.0 V


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	RATING
VCC	DC supply voltage		0.5 to +4.6	V
VIK	DC input diode current	VI<0	50	MA
VI	DC input voltage	For data inputs with bus hold	0.5 to VCC +0.5	V
		For data inputs without bus hold	0.5 to +4.6
		For control pins1	0.5 to +4.6
VOK	DC output diode current	VO>VCC OR VO < 0	±50	MA
VO	DC output voltage	Note 1	0.5 to VCC +0.5	V
VO	DC output source or sink current	VO=O TO VCC	±50	MA
IGND,ICC	DC VCC or GND current		±100	MA
TSTG	Storage temperature range		65 to +150
PTOP	Power dissipation per package plastic medium-shrink (SSOP) plastic thin-medium-shrink (TSSOP)	For temperature range: 40 to +125   above +55derate linearly with 11.3 mW/K above +55 derate linearly with 8 mW/K	850 600	MW

Description

The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions.
The 74ALVC16245(74ALVCH16245) features two output enable(nOE ) inputs for easy cascading and two send/receive (nDIR) inputs for direction control. nOE  controls the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The 74ALVCH16245 has active bus hold circuitry which is provided  to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
The 74ALVCH16245 has 5V tolerant inputs.