74ALVC244

Features: · Wide supply voltage range from 1.65 to 3.6 V· 3.6 V tolerant inputs/outputs· CMOS low power consumption· Direct interface with TTL levels (2.7 to 3.6 V)· Power-down mode· Latch-up performance exceeds 250 mA· Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) ...

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74ALVC244 Picture
SeekIC No. : 004249390 Detail

74ALVC244: Features: · Wide supply voltage range from 1.65 to 3.6 V· 3.6 V tolerant inputs/outputs· CMOS low power consumption· Direct interface with TTL levels (2.7 to 3.6 V)· Power-down mode· Latch-up perfor...

floor Price/Ceiling Price

Part Number:
74ALVC244
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/12

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Product Details

Description



Features:

· Wide supply voltage range from 1.65 to 3.6 V
· 3.6 V tolerant inputs/outputs
· CMOS low power consumption
· Direct interface with TTL levels (2.7 to 3.6 V)
· Power-down mode
· Latch-up performance exceeds 250 mA
· Complies with JEDEC standard:
  JESD8-7 (1.65 to 1.95 V)
  JESD8-5 (2.3 to 2.7 V)
  JESD8B/JESD36 (2.7 to 3.6 V)
· ESD protection:
  HBM EIA/JESD22-A114-A exceeds 2000 V
  MM EIA/JESD22-A115-A exceeds 200 V.



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
CONDITIONS
Min
Max
Unit
VCC
Supply Voltage
-0.5
+4.6
V
VI
input voltage
-0.5
+4.6
V
IIK
input diode current
VI < 0
-50
mA
IOK
output diode current
VO > VCC or VO < 0
±50
mA
VO
output voltage
enable mode; notes 1 and 2
-0.5
VCC + 0.5
V
disable mode
-0.5
+4.6
V
Power-down mode; note 2
-0.5
+4.6
V
IO
output source or sink current
VO = 0 to VCC
±50
mA
ICC or IGND
VCC or GND current
±100
mA
Tstg
Storage temperature
-65
+150
Ptot
power dissipation
Tamb = -40 to +85 °C; note 3
500
mW
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
3. For SO20 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 °C derate linearly with 4.5 mW/K.



Description

The 74ALVC244 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

The 74ALVC244 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times.




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