74ALVC16834A

Features:

*Wide supply voltage range of 1.2 V to 3.6 V
*Complies with JEDEC standard no. 8-1A.
*CMOS low power consumption
*Direct interface with TTL levels
*Current drive ± 24 mA at 3.0 V
*MULTIBYTE^TM  flow-through standard pin-out architecture
*Low inductance multiple VCC and GND pins for minimum noise
  and ground bounce
*Output drive capability 50 transmission lines @ 85°C
*Input diodes to accommodate strong drivers


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		0.5 to +4.6	V
IIK	DC input diode current	VI 0	50	mA
VI	DC input voltage	For control pins 1	0.5 to +4.6	V
		For data inputs1	0.5 to VCC+0.5
IOK	DC output diode current	VO VCC or VO 0	±50	mA
VO	DC output voltage	Note 1	0.5toVCC+0.5	V
IO	DC output source or sink current	VO = 0 to VCC	±50	mA
IGND,ICC	DC VCC or GND current		±100	mA
Tstg	Storage temperature range		65 to +150	°C
PTOT	Power dissipation per package plastic medium-shrink (SSOP) plastic thin-medium-shrink(TSSOP)	For temperature range: 40 to +125 above +55 derate linearly with 8 mW/K	600	mW

Description

The 74ALVC16834A is an 18-bit registered driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP).

When LE of the 74ALVC16834A is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop.