74ALVC16501

Features:

` 1.65V3.6V VCC supply operation
` 3.6V tolerant inputs and outputs
` tPD (A to B, B to A)
    3.4 ns max for 3.0V to 3.6V VCC
    4.0 ns max for 2.3V to 2.7V VCC
    7.0 ns max for 1.65V to 1.95V VCC
` Power-down high impedance inputs and outputs
` Supports live insertion/withdrawal (Note 1)
` Uses patented noise/EMI reduction circuitry
` Latchup conforms to JEDEC JED78
` ESD performance:
    Human body model > 2000V
    Machine model >200V
Note 1: To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pull-up resistor and OEAB should be tied to GND through a pull-down resistor; the minimum value of the resistors is determined by the current-sourcing capability of the driver.

Pinout




Specifications

Supply Voltage (VCC) . . . . . . . . . .. . . . . . . . . .. . −0.5V to +4.6V
DC Input Voltage (VI). . . . . . . . . .. . . . . . . . . .. . .  −0.5V to 4.6V
Output Voltage (VO) (Note 6) . . . . . . . . . .. .−0.5V to VCC +0.5V
DC Input Diode Current (IIK)
    VI < 0V . . . . . . . . . .. . . . . . . . . .. . . . . . . . . .. . . . . . .  −50 mA
DC Output Diode Current (IOK)
    VO < 0V . . . . . . . . . .. . . . . . . . . .. . . . . . . . . .. . . . . .  .−50 mA
DC Output Source/Sink Current
    (IOH/IOL) . . . . . . . . . .. . . . . . . . . .. . . . . . . . . .. . . . . .±50 mA
DC VCC or GND Current per
    Supply Pin (ICC or GND) . . . . . . . . . .. . . . . . . . . .. . . ±100 mA
Storage Temperature Range (TSTG) . . . . . . . −65°C to +150°C


Description

The 74ALVC16501 is an 18-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data of the 74ALVC16501 flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. When OEAB is HIGH, the outputs are active. When OEAB is LOW, the outputs are in a highimpedance state.

Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active HIGH and OEBA is active LOW).

The 74ALVC16501 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O capability up to 3.6V.

The 74ALVC16501 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.