74ALVC164245

5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range:
    3 V port (V_CCA): 1.5 V to 3.6 V
    5 V port (V_CCB): 1.5 V to 5.5 V.
CMOS low power consumption
Direct interface with TTL levels
Control inputs voltage range from 2.7 V to 5.5 V
Inputs accept voltages up to 5.5 V
High-impedance out puts when V_CCA or V_CCB = 0 V
Complies with JEDEC standard JESD8-B/JESD36
ESD protection:
   HBM EIA/JESD22-A114-B exceeds 2000 V
   MM EIA/JESD22-A115-A exceeds 200 V.
Specified from -40 °C to +85 °C and -40 °C to +125 °C.

The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMO device, superior to most advanced CMOS compatible TTL families.
The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment.
This device can be used as two 8-bit transceivers or one 16-bit transceiver
The direction control inputs (1DIR and 2DIR) of the 74ALVC164245 determine the direction of the data flow.nDIR (active HIGH) enables data from nA ports to nB ports. nDIR (active LOW) enables data from nB ports to nA ports. The output enable inputs (1OE  and 2OE ), when HIGH,disable both nA and nB ports by placing them in a high-impedance OFF-state. The nB ports interface with the 5 V bus. The nA ports interface with the 3 V bus.
In suspend mode, when one of the supply voltages of the 74ALVC164245 is zero, there will be no current flow from the non-zero supply towards the zero supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than V_diode (typical 0.7 V). V_CCB V_CCA (except in suspend mode).