74ALVC16373

Features:

1.1V to 3.6V V_CC  supply operation
   3.6V tolerant inputs and outputs t  (I_PD  to O _{n n} )
   3.5 ns max for 3.0V to 3.6V V_CC
   3.9 ns max for 2.3V to 2.7V V_CC
   6.8 ns max for 1.65V to 1.95V V_CC
Power-off high impedance inputs and outputs
Support live insertion and withdrawal (Note 1)
Uses patented noise/EMI reduction circuitry
Latchup conforms to JEDEC JED78
ESD performance:
  Human body model  2000V
  Machine model   200V
Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)

Pinout




Specifications

Supply Voltage (V_CC ) ...................0.5V to  4.6V
DC Input Voltage (V_I).................... 0.5V to 4.6V
Output Voltage (V_O ) (Note 5)0.5V to V_CC  0.5V
DC Input Diode Current (I_IK )
  V_I   0V ...................................................50 mA
DC Output Diode Current (I_OK )
  V_O    0V................................................. 50 mA
DC Output Source/Sink Current
  (I_OH /I_OL )..............................................50 mA
DC V_CC  or GND Current per
  Supply Pin (I_CC  or GND)...................... 100 mA
Storage Temperature Range (T ) 65 C to  150 C


Description

The 74ALVC16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state. The 74ALVC16373 is designed for low voltage (1.1V to 3.6V) V_CC  applications with I/O compatibility up to 3.6V.

The 74ALVC16373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.